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Digital logic | Code Converters – Binary to/from Gray Code

Prerequisite – Number System and base conversions

Gray Code system is a binary number system in which every successive pair of numbers differs in only one bit. It is used in applications in which the normal sequence of binary numbers generated by the hardware may produce an error or ambiguity during the transition from one number to the next.
For example, the states of a system may change from 3(011) to 4(100) as- 011 — 001 — 101 — 100. Therefore there is a high chance of a wrong state being read while the system changes from the initial state to the final state.
This could have serious consequences for the machine using the information. The Gray code eliminates this problem since only one bit changes its value during any transition between two numbers.

Converting Binary to Gray Code –

Let b_0,:b_1,:b_2:,:and:b_3 be the bits representing the binary numbers, where b_0 is the LSB and b_3 is the MSB, and
Let g_0,:g_1,:g_2:,:and:g_3 be the bits representing the gray code of the binary numbers, where g_0 is the LSB and g_3 is the MSB.
The truth table for the conversion is-
 egin{tabular}{||c|c|c|c||c|c|c|c||} hline  multicolumn{4}{||c||}{Binary} & multicolumn{4}{|c||}{Gray Code}\ hline  b_3 & b_2 & b_1 & b_0 & g_3 & g_2 & g_1 & g_0 \ hline hline  0 & 0 & 0 & 0 & 0 & 0 & 0 & 0 \  hline  0 & 0 & 0 & 1 & 0 & 0 & 0 & 1 \  hline  0 & 0 & 1 & 0 & 0 & 0 & 1 & 1 \  hline  0 & 0 & 1 & 1 & 0 & 0 & 1 & 0 \  hline hline  0 & 1 & 0 & 0 & 0 & 1 & 1 & 0 \  hline  0 & 1 & 0 & 1 & 0 & 1 & 1 & 1 \  hline  0 & 1 & 1 & 0 & 0 & 1 & 0 & 1 \  hline  0 & 1 & 1 & 1 & 0 & 1 & 0 & 0 \  hline hline  1 & 0 & 0 & 0 & 1 & 1 & 0 & 0 \  hline  1 & 0 & 0 & 1 & 1 & 1 & 0 & 1 \  hline  1 & 0 & 1 & 0 & 1 & 1 & 1 & 1 \  hline  1 & 0 & 1 & 1 & 1 & 1 & 1 & 0 \  hline hline  1 & 1 & 0 & 0 & 1 & 0 & 1 & 0 \  hline  1 & 1 & 0 & 1 & 1 & 0 & 1 & 1 \  hline  1 & 1 & 1 & 0 & 1 & 0 & 0 & 1 \  hline  1 & 1 & 1 & 1 & 1 & 0 & 0 & 0 \  hline hline end{tabular}
To find the corresponding digital circuit, we will use the K-Map technique for each of the gray code bits as output with all of the binary bits as input.
K-map for g_0

K-map for g_1

K-map for g_2

K-map for g_3

Corresponding minimized boolean expressions for gray code bits –
 g_0 = b_0b_1^prime + b_1b_0^prime = b_0 oplus b_1\ g_1 = b_2b_1^prime + b_1b_2^prime = b_1 oplus b_2\ g_2 = b_2b_3^prime + b_3b_2^prime = b_2 oplus b_3\ g_3 = b_3
The corresponding digital circuit –

Converting Gray Code to Binary –

Converting gray code back to binary can be done in a similar manner.
Let b_0,:b_1,:b_2:,:and:b_3 be the bits representing the binary numbers, where b_0 is the LSB and b_3 is the MSB, and
Let g_0,:g_1,:g_2:,:and:g_3 be the bits representing the gray code of the binary numbers, where g_0 is the LSB and g_3 is the MSB.
Truth table-
 egin{tabular}{||c|c|c|c||c|c|c|c||} hline  multicolumn{4}{||c||}{Gray Code} & multicolumn{4}{|c||}{Binary}\ hline  g_3 & g_2 & g_1 & g_0 & b_3 & b_2 & b_1 & b_0\ hline hline  0 & 0 & 0 & 0 & 0 & 0 & 0 & 0 \  hline  0 & 0 & 0 & 1 & 0 & 0 & 0 & 1 \  hline  0 & 0 & 1 & 0 & 0 & 0 & 1 & 1 \  hline  0 & 0 & 1 & 1 & 0 & 0 & 1 & 0 \  hline hline  0 & 1 & 0 & 0 & 0 & 1 & 1 & 1 \  hline  0 & 1 & 0 & 1 & 0 & 1 & 1 & 0 \  hline  0 & 1 & 1 & 0 & 0 & 1 & 0 & 0 \  hline  0 & 1 & 1 & 1 & 0 & 1 & 0 & 1 \  hline hline  1 & 0 & 0 & 0 & 1 & 1 & 1 & 1 \  hline  1 & 0 & 0 & 1 & 1 & 1 & 1 & 0 \  hline  1 & 0 & 1 & 0 & 1 & 1 & 0 & 0 \  hline  1 & 0 & 1 & 1 & 1 & 1 & 0 & 1 \  hline hline  1 & 1 & 0 & 0 & 1 & 0 & 0 & 0 \  hline  1 & 1 & 0 & 1 & 1 & 0 & 0 & 1 \  hline  1 & 1 & 1 & 0 & 1 & 0 & 1 & 1 \  hline  1 & 1 & 1 & 1 & 1 & 0 & 1 & 0 \  hline hline end{tabular}



Using K-map to get back the binary bits from the gray code –
K-map for b_0

K-map for b_1

K-map for b_2

K-map for b_3

Corresponding Boolean expressions –

     egin{align*} b_0 &=g_3^prime g_2^prime g_1^prime g_0 + g_3^prime g_2^prime g_1g_0^prime + g_3^prime g_2g_1^prime g_0^prime  + g_3^prime g_2g_1g_0 +g_3g_2^prime g_1^prime g_0^prime  + g_3g_2^prime g_1g_0 \ &:::+g_3g_2g_1^prime g_0 + g_3g_2g_1g_0^prime \ &= g_3^prime g_2^prime( g_1^prime g_0 +  g_1g_0^prime) + g_3^prime g_2(g_1^prime g_0^prime  + g_1g_0) +g_3g_2^prime(g_1^prime g_0^prime  +  g_1g_0 )\ &:::+g_3g_2 (g_1^prime g_0 + g_1g_0^prime) \ &= g_3^prime g_2^prime(g_0oplus g_1) + g_3^prime g_2(g_0odot g_1)+g_3g_2^prime(g_0odot g_1) + g_3g_2 (g_0oplus g_1) \ &= (g_0oplus g_1)(g_2odot g_3) + (g_0odot g_1)(g_2oplus g_3)\ &= g_3oplus g_2oplus g_1oplus g_0\ b_1 &= g_3^prime g_2^prime g_1 + g_3^prime g_2g_1^prime  + g_3g_2g_1 + g_3g_2^prime g_1^prime \ &= g_3^prime(g_2^prime g_1 + g_2g_1^prime)  + g_3(g_2g_1 + g_2^prime g_1^prime) \ &= g_3^prime(g_2oplus g_1)  + g_3(g_2odot g_1) \ &= g_3oplus g_2oplus g_1\ b_2 &= g_3^prime g_2 + g_3g_2^prime\ &= g_3oplus g_2\ b_3 &= g_3 end{align*}

Corresponding digital circuit –

References –

Digital Design, 5th edition by Morris Mano and Michael Ciletti

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