The 8086 processor provides 16 data lines but the memory chip will consist of only 8 data lines therefore to occupy all system data lines of processor we require to memory chips.
One of them will be connected to lower order Data bus (D0 to D7) and other will be connected to higher order Data bus (D8 to D16). The total memory required in a system will be divided into two parts. All the locations in part one will have even addresses and if it is connected to D0 to D7 of processor. This part is known as Even bank.
Similarly all the locations in part two will have odd addresses and it is connected to D8 to D15. This banking scheme allows to have same addresses for two parallel bytes and process can perform 16 bit data transfer.
The least Significant bit of address (A0 is not used for byte selection)it is reserved for bank selection. Therefore A0=0 will select Even bank. The BHE signal is used for selection of odd bank.the processor will used combination of this two signals decide type of data transfer.
|BHE||A0||types of Transfer|
|1||0||8 bit data transfer from even address through D7 to D0|
|0||1||8 bit data transfer from odd address through D15 to D8|
|0||0||16 bit data transfer from even address through D15 to D0|
|1||0||16 bit data transfer fron odd addresses through D15 to D0|
In this case the first machine cycle generates odd address (A0=1) transfer lower order 8 data bits on higher order data bus.In second machine cycle higher order data bus will be transfer on lower order data bus.